Location: Hyderabad
Company: Micron Technology
Role And Responsibilities
- Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support.
- Perform layout verification like LVS/DRC/Antenna, quality check and support documentation.
- Responsible for on-time delivery of block-level layouts with acceptable quality.
- Demonstrate leadership qualities in area/time estimation, scheduling, and execution to meet project schedule/milestones in multiple project environment.
- Ability to guide Peer team-members in their execution of Sub block-level layouts & review critical items.
- Effectively communicating with Local engineering teams to assure the success of layout project.
Qualification/Requirements
- 4 to 6 years’ experience in analog/custom layout design in advanced CMOS process, in various technology nodes (Planar, FinFET )
- Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must.
- Should have hands on experience in creating layout of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,
- Good understanding of Analog Layout fundamentals (e.g., Matching, Electromigration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices etc.)
- Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,
- Ability to understand design constraints and implement high-quality layouts.
- Excellent problem-solving skills in physical verification of custom layout.
- Multiple Tape out support experience will be an added advantage.
- Excellent verbal and written communication skills.
