As automotive firms, hyperscalers, and startups pursue custom chips, SignOff is building capabilities that can take designs from architecture closer to finished silicon, backed by RISC-V IP, EDA expertise, foundry and OSAT relationships, and an expanding engineering ecosystem.
As chip demand spreads beyond traditional semiconductor companies, SignOff is quietly expanding its role from executing parts of the design cycle to helping customers take an architecture closer to finished silicon. New chip customers are increasingly coming from outside traditional semiconductor companies. As automotive companies, hyperscalers, startups, and other technology businesses explore custom silicon, they are looking for partners that can take an architecture beyond an individual design task and towards a manufacturable chip.
This changing customer profile is prompting Bengaluru-based SignOff Semiconductor to expand its role in the semiconductor value chain. In an interaction with EFY at Semicon India, Rakesh Trivedi, Chief Strategy and Growth Officer, SignOff Semiconductor said it is building towards a turnkey custom-silicon model, while continuing to operate as a VLSI design services company. The model is aimed at companies that may have an architecture or chip idea but lack the semiconductor-specific capabilities needed to take it through design and manufacturing.
The company has already begun investing around this opportunity. Over the past few years, it has built relationships across the semiconductor ecosystem, including with foundries and OSATs, while investing in EDA capabilities and bringing in experienced talent from earlier chip programmes. The aim is to take a customer’s architecture further without requiring the customer to build an entire semiconductor organisation internally.
One of its more unusual moves has been the development of soft IP around its RISC-V-based Kaveri platform. The company describes this not as an entry into the product business, but as a way to demonstrate its ability to work across the chip-development chain—from architecture through implementation and towards GDS and beyond. The soft-IP approach also leaves room for customisation based on the eventual application. This Kaveri work is therefore not simply another IP offering. The company is using it to demonstrate how much of the silicon journey it can handle when a customer needs more than conventional design services.
The company says turnkey work has already been growing and expects it to account for a significant share of its business over the next few years. Rather than making a sudden transition, they are building this capability gradually, using customer demand as the trigger for investment and expansion. That approach also reflects a change in the type of support customers are seeking. They mention it is seeing demand for broader engineering capabilities, faster and more flexible execution, and teams that understand the complete design cycle rather than isolated activities. AI-enabled engineering is also beginning to enter these conversations, although the company says that it is still in the experimentation phase.
The bigger opportunity, however, lies in custom silicon. As more non-traditional chip companies outsource semiconductor execution to specialist partners, the company sees an opportunity to provide engineering support from architecture through to silicon. The company is therefore positioning its next phase less around becoming another product company and more around becoming a trusted execution partner for custom silicon, backed by its ecosystem, tools, talent, and early IP work being assembled behind the scenes.
The full EFY interview explores the details of what the company is building, why it chose RISC-V as one of its technology demonstrations, and how its turnkey ambitions could reshape its role in the semiconductor ecosystem. Stay tuned.
